39. Device electronic signature

The device electronic signature is stored in the System memory area of the flash memory module, and can be read using the debug interface or by the CPU. It contains factory-programmed identification and calibration data that allow the user firmware or other external devices to automatically match to the characteristics of the STM32U0 series microcontroller.

39.1 Unique device ID register (96 bits)

The unique device identifier is ideally suited:

• • for use as serial numbers (for example USB string serial numbers or other end applications)
• • for use as part of the security keys in order to increase the security of code in flash memory while using and combining this unique ID with software cryptographic primitives/ and protocols before programming the internal flash memory
• • to activate secure boot processes, etc.

The 96-bit unique device identifier provides a reference number which is unique for any device and in any context. These bits cannot be altered by the user.

Base address: 0x1FFF 6E50 (STM32U073/83xx), 0x1FFF 3E50 (STM32U031xx)

Address offset: 0x00

Reset value: 0xXXXX XXXX (where X is factory-programmed)

Bits 31:0 UID[31:0] : X and Y coordinates on the wafer expressed in BCD format

Address offset: 0x04

Reset value: 0xXXXX XXXX (where X is factory-programmed)

Bits 31:8 UID[63:40]: LOT_NUM[23:0]

Lot number (ASCII encoded)

Bits 7:0 UID[39:32]: WAF_NUM[7:0]

Wafer number (8-bit unsigned number)

Address offset: 0x08

Reset value: 0xXXXX XXXX where X is factory-programmed

Bits 31:0 UID[95:64]: LOT_NUM[55:24]

Lot number (ASCII encoded)

39.2 Flash memory size data register

Base address: 0x1FFF 6EA0 (STM32U073/83xx), 0x1FFF 3EA0 (STM32U031xx)

Address offset: 0x00

Reset value: 0xXXXX where X is factory-programmed

Bits 15:0 FLASH_SIZE[15:0] : Flash memory size

This bitfield indicates the size of the device flash memory expressed in Kbytes.

As an example, 0x040 corresponds to 64 Kbytes.

39.3 Package data register

Base address: 0x1FFF 6D00 (STM32U073/83xx), 0x1FFF 3D00 (STM32U031xx)

Address offset: 0x00

Reset value: 0xXXXX where X is factory-programmed

Bits 15:4 Reserved

Bits 3:0 PKG[3:0] : Package type

Condition: STM32U031xx

0000 : Reserved

0001 : UFQFPN32

0011 : UFQFPN48

0100 : LQFP48

0101 : LQFP64

0110 : BGA64

1001 : TSSOP20

1010 : WLCSP29

1011 : LQFP32

Others: Reserved

Condition: STM32U0x3xx

0000 : Reserved

0001 : UFQFPN32

0010 : WLCSP42

0011 : UFQFPN48

0100 : LQFP48

0101 : LQFP64

0110 : BGA64

0111 : LQFP80

1000 : BGA81

Others : Reserved

Appendix A OEM key CRC calculation source code

Below is the source code that can be used to compare the result of the CRC computation performed on the loaded OEM1/2 keys (option byte loading or programming of new keys), with the CRC values of the OEM1/2 keys available in the OEM1KEYCRC/OEM2KEYCRC bitfields of the FLASH_OEMKEYSR register.

uint8_t getCRC(uint32_t * keyin)
{
    const uint8_t CRC7_POLY = 0x7;
    const uint32_t key_strobe[4] = {0xAA55AA55, 0x3, 0x18, 0xC0};
    uint8_t i, j, k, crc = 0x0;
    uint32_t keyval;

    for (j = 0; j < 4; j++)
    {
        keyval = *(keyin+j);
        if (j == 0)
        {
            keyval ^= key_strobe[0];
        } else
        {
            keyval ^= (key_strobe[j] << 24) | (crc << 16) | (key_strobe[j] << 8) |
            crc;
        }
        for (i = 0, crc = 0; i < 32; i++)
        {
            k = (((crc >> 7) ^ (keyval >> (31-i))&0xF)) & 1;
            crc <<= 1;
            if (k)
            {
                crc ^= CRC7_POLY;
            }
        }
        crc ^= 0x55;
    }
    return crc;
}

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Revision history

Table 261. Document revision history

Table 261. Document revision history (continued)

Table 261. Document revision history (continued)

Table 261. Document revision history (continued)

Table 261. Document revision history (continued)

Index

A

B

C

D

L

M

O

P

R

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