43. Infrared interface (IRTIM)

An infrared interface (IRTIM) for remote control is available on the device. It can be used with an infrared LED to perform remote control functions.

It uses internal connections with USART1, UART4, TIM16, and TIM17 as shown in Figure 627 .

To generate the infrared remote control signals, the IR interface must be enabled and TIM16 channel 1 (TIM16_OC1) and TIM17 channel 1 (TIM17_OC1) must be properly configured to generate correct waveforms.

The infrared receiver can be implemented easily through a basic input capture mode.

Figure 627. IRTIM internal hardware connections

Figure 627. IRTIM internal hardware connections diagram

The diagram illustrates the internal hardware connections for the Infrared Interface (IRTIM). On the left, four input sources are shown: TIM17_CH1 (generating a high-frequency carrier signal), TIM16_CH1 (generating a modulation envelope), USART1, and UART4. These inputs are connected to a multiplexer. The output of the multiplexer is connected to an AND gate. The AND gate also receives inputs from two configuration registers: IR_MOD[1:0] and IR_POL. The output of the AND gate is connected to an OR gate. The output of the OR gate is connected to the IR_OUT pin, which generates the final infrared signal. The diagram is labeled with 'IRTIM' in the center and 'MSV74263V1' in the bottom right corner.

Figure 627. IRTIM internal hardware connections diagram

All standard IR pulse modulation modes can be obtained by programming the two timer output compare channels.

TIM17 is used to generate the high frequency carrier signal, while TIM16 or alternatively USART1 or UART4 generates the modulation envelope according to the setting of the IR_MOD[1:0] bits in the SYSCFG_CFGR1 register.

The polarity of the output signal from IRTIM is controlled by the IR_POL bit in the SYSCFG_CFGR1 register and can be inverted by setting of this bit.

The infrared function is output on the IR_OUT pin. The activation of this function is done through the GPIOx_AFRx register by enabling the related alternate function bit.

The high sink LED driver capability (only available on the PB9 pin) can be activated through the PB9_FMP bit in the SYSCFG_CFGR1 register and used to sink the high current needed to directly control an infrared LED.