1. Documentation conventions
1.1 General information
The STM32H72x and STM32H73x devices embed an Arm ® Cortex ® -A7 with FPU core.
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1.2 List of abbreviations for registers
The following abbreviations (a) are used in register descriptions:
| read/write (rw) | Software can read and write to this bit. |
| read-only (r) | Software can only read this bit. |
| write-only (w) | Software can only write to this bit. Reading this bit returns the reset value. |
| read/clear write0 (rc_w0) | Software can read as well as clear this bit by writing 0. Writing 1 has no effect on the bit value. |
| read/clear write1 (rc_w1) | Software can read as well as clear this bit by writing 1. Writing 0 has no effect on the bit value. |
| read/clear write (rc_w) | Software can read as well as clear this bit by writing to the register. The value written to this bit is not important. |
| read/clear by read (rc_r) | Software can read this bit. Reading this bit automatically clears it to 0. Writing this bit has no effect on the bit value. |
| read/set by read (rs_r) | Software can read this bit. Reading this bit automatically sets it to 1. Writing this bit has no effect on the bit value. |
| read/set (rs) | Software can read as well as set this bit. Writing 0 has no effect on the bit value. |
| read/write once (rwo) | Software can only write once to this bit and can also read it at any time. Only a reset can return the bit to its reset value. |
| toggle (t) | The software can toggle this bit by writing 1. Writing 0 has no effect. |
| read-only write trigger (rt_w1) | Software can read this bit. Writing 1 triggers an event but has no effect on the bit value. |
| Reserved (Res.) | Reserved bit, must be kept at reset value. |
a. This is an exhaustive list of all abbreviations applicable to STMicroelectronics microcontrollers, some of them may not be used in the current document.
1.3 Glossary
This section gives a brief definition of acronyms and abbreviations used in this document:
- • Word : data of 32-bit length.
- • Half-word : data of 16-bit length.
- • Byte : data of 8-bit length.
- • AHB : advanced high-performance bus.
1.4 Availability of peripherals
For availability of peripherals and their number across all sales types, refer to the particular device datasheet.
1.5 Availability of security features
For security feature availability please refer to the table below:
Table 1. Availability of security features
| Security feature | STM32H730xB, STM32H733xG and STM32H735xG | STM32H723xE/G and STM32H725xE/G |
|---|---|---|
| Embedded Flash memory (FLASH): – Flash Secure-only area | ||
| Security memory management: – Secure access mode – Root secure services (RSS) | Available | Not available |
| On-the-fly decryption engine (OTFDEC) | ||
| Cryptographic processor (CRYP) | ||
| Hash processor (HASH) |