1. Documentation conventions

1.1 General information

The STM32L0x1 devices have an Arm ^®(a) Cortex ^® -M0+ core.

1.2 List of abbreviations for registers

The following abbreviations ^(b) are used in register descriptions:

a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

b. This is an exhaustive list of all abbreviations applicable to STMicroelectronics microcontrollers, some of them may not be used in the current document.

1.3 Glossary

This section gives a brief definition of acronyms and abbreviations used in this document:

• • Sector: 32 pages write protection granularity in the Code area
• • Page: 32 words for Code and System Memory areas, 1 word for Data, Factory Option and User Option areas
• • Word: data of 32-bit length.
• • Half-word: data of 16-bit length.
• • Byte: data of 8-bit length.
• • IAP (in-application programming): IAP is the ability to re-program the Flash memory of a microcontroller while the user program is running.
• • ICP (in-circuit programming): ICP is the ability to program the Flash memory of a microcontroller using the JTAG protocol, the SWD protocol or the bootloader while the device is mounted on the user application board.
• • Option bytes: product configuration bits stored in the Flash memory.
• • OBL: option byte loader.
• • AHB: advanced high-performance bus.
• • NVM: non-volatile memory.
• • ECC: error code correction.
• • DMA: direct memory access.
• • MIF: NVM interface.
• • PCROP: proprietary code readout protection.

1.4 Availability of peripherals

For availability of peripherals and their number across all sales types, refer to the particular device datasheet.

1.5 Product category definition

Table 1 gives an overview of memory density versus product line.

The present reference manual describes the superset of features for each product line, Refer to Table 2 for the list of features per category.

Table 2. Overview of features per category (continued)